A memory bandwidth optimized interpolator for motion compensation in the H.264 video decoding

Abstract

The paper presents an interpolator design for motion compensation used in the H.264 video decoding. The presented design is optimized according to the available data bandwidth to avoid the idle hardware. In addition, the required memory access is further reduced by the interpolation window optimization. The implementation shows that the presented design can save about 10% of silicon area or at least seven interpolation filters than that in the previous works. Besides, 12.50% to 71.3% of cycle count of motion compensation can be reduced by the interpolator window optimization. Finally, our architecture can be easily adjusted under different memory bandwidth.