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dc.contributor.authorMa, Ying-Haoen_US
dc.contributor.authorChen, Lei-Foneen_US
dc.contributor.authorLee, Chen-Yien_US
dc.date.accessioned2014-12-08T15:25:07Z-
dc.date.available2014-12-08T15:25:07Z-
dc.date.issued2006en_US
dc.identifier.isbn1-4244-0179-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/17501-
dc.description.abstractIn COFDM receiver, the full time operation equalizer is the first stage of data recovery. Since the performance of equalizer will influence the overall system performance, the hardware cost and power consumption of equalizer may not be the first issue in existing designs. In this paper, we propose an approach of equalizer for COMM broadcasting systems. This equalizer is optimized for hardware cost, and power consumption without performance lost. Comparing with existing design for 0.18um. process, the proposed design area is reduced to 9.5% and the power consumption is reduced to 30.1% of division-based equalizer, respectively.en_US
dc.language.isoen_USen_US
dc.titleA channel equalizer design for COFDM systemen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2006 International Symposium on VLSI Design, Automation, and Test (VLSI-DAT), Proceedings of Technical Papersen_US
dc.citation.spage75en_US
dc.citation.epage78en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000239709500020-
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