完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, SC | en_US |
dc.contributor.author | Peng, WH | en_US |
dc.contributor.author | Wang, SH | en_US |
dc.contributor.author | Chiang, TH | en_US |
dc.date.accessioned | 2014-12-08T15:25:11Z | - |
dc.date.available | 2014-12-08T15:25:11Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.isbn | 0-7803-8838-0 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/17567 | - |
dc.description.abstract | In this paper, we present an ARM platform-based architecture design for de-blocking filter in H.264. According to statistical analysis, we propose an adaptive transmission scheme to reduce the bus workload. Moreover, we develop a bus-interleaved architecture to reduce the processing latency. As compared to the state-of-the-art designs, our scheme offers 3x to 14x performance improvement. Furthermore, we have proved our design using an ARM emulation board. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A platform-based de-blocking filter design with bus-interleaved architecture for H.264 | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | ICCE: 2005 INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS, DIGEST OF TECHNICAL PAPERS | en_US |
dc.citation.spage | 293 | en_US |
dc.citation.epage | 294 | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.identifier.wosnumber | WOS:000228036100147 | - |
顯示於類別: | 會議論文 |