Gap-processing time analysis of an indicator-based stall avoidance mechanism for high speed downlink packet access

Abstract

For supporting high speed downlink packet access (HSDPA) in the wideband code division multiple access (WCDMA) system, an indicator-based stall avoidance mechanism was recently proposed to remove the nonrecoverable gap in the received out-of-sequence packets. The stall of delivering medium access control (MAC) layer data to the upper layer is a serious problem when a negative acknowledgement (NACK) control signal becomes an acknowledgement (ACK) signal in the multiprocess stop-and-wait (SAW) hybrid automatic repeat request (HARQ) mechanism. This paper presents an analytical model to calculate the gap-processing time of the indicator-based stall avoidance mechanism. Instead of time-consuming simulations, the gap-processing time of the indicator-based stall avoidance in the multi-process SAW HARQ mechanism in the HSDPA system can be calculated easily by the proposed method for different packet error rates, various numbers of allowable users, and different numbers of parallel processes in the SAW HARQ mechanism. Numerical results are performed in a Rayleigh fading channel to demonstrate the effectiveness of the proposed method in understanding the performance tradeoffs of the multi-process HARQ mechanism in HSDPA.