Linear power amplifier with a modified predistortion compensation for NCDMA applications

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Kao, Yao-Huang	en_US
dc.contributor.author	Chen, Wei-Chung	en_US
dc.date.accessioned	2014-12-08T15:25:19Z	-
dc.date.available	2014-12-08T15:25:19Z	-
dc.date.issued	2005	en_US
dc.identifier.isbn	0-7803-9433-X	en_US
dc.identifier.uri	http://hdl.handle.net/11536/17697	-
dc.description.abstract	The selection of the matched transistor pair in a cascaded architecture for predistortion compensation is nontrivial. In this study, a modified architecture of predistortion with two paths is presented for the high power amplifier. The goal is to develop a IOW linear power amplifier with LDMOS transistor for 8 channels NCDMA repeater from 870 to 880MHz. With the modified scheme, the improvement of intermodulation is larger than 10dB and spurious is less than 50dBc.	en_US
dc.language.iso	en_US	en_US
dc.subject	linear power amplifier	en_US
dc.subject	predistortion	en_US
dc.subject	LDMOS	en_US
dc.subject	NCDMA	en_US
dc.title	Linear power amplifier with a modified predistortion compensation for NCDMA applications	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2005 ASIA-PACIFIC MICROWAVE CONFERENCE PROCEEDINGS, VOLS 1-5	en_US
dc.citation.spage	193	en_US
dc.citation.epage	196	en_US
dc.contributor.department	傳播研究所	zh_TW
dc.contributor.department	Institute of Communication Studies	en_US
dc.identifier.wosnumber	WOS:000237449900051	-
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