A design of image reject mixer for DTV tuner

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Kao, Yao-Huang	en_US
dc.contributor.author	Yu, Ching-Jung	en_US
dc.date.accessioned	2014-12-08T15:25:19Z	-
dc.date.available	2014-12-08T15:25:19Z	-
dc.date.issued	2005	en_US
dc.identifier.isbn	0-7803-9433-X	en_US
dc.identifier.uri	http://hdl.handle.net/11536/17700	-
dc.description.abstract	An image reject mixer of Hartley type for the digital TV tuner was designed. It consists of highly linear mixers, wide band polyphase filters, and an adder. The precise quadrature phase against process variation is specially focused. The rejection ratio is aimed at 30dB. The chip was fabricated by TSMC 0.25um 1P5M CMOS process.	en_US
dc.language.iso	en_US	en_US
dc.subject	DTV	en_US
dc.subject	image reject mixer	en_US
dc.subject	polyphase filter	en_US
dc.subject	Hartley architecture	en_US
dc.title	A design of image reject mixer for DTV tuner	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2005 ASIA-PACIFIC MICROWAVE CONFERENCE PROCEEDINGS, VOLS 1-5	en_US
dc.citation.spage	869	en_US
dc.citation.epage	872	en_US
dc.contributor.department	傳播研究所	zh_TW
dc.contributor.department	Institute of Communication Studies	en_US
dc.identifier.wosnumber	WOS:000237449901046	-
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