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dc.contributor.authorLai, Tai-Xiangen_US
dc.contributor.authorKer, Ming-Douen_US
dc.date.accessioned2014-12-08T15:25:20Z-
dc.date.available2014-12-08T15:25:20Z-
dc.date.issued2005en_US
dc.identifier.isbn978-0-7803-9339-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/17725-
dc.description.abstractCable Discharge Event (CDE) has been the main cause which damages the Ethernet interface. The transmission line pulsing (TLP) system has been the most important method to observe electric characteristics of the device under human-body-model (HBM) ESD stress. In this work, the long-pulse transmission line pulsing (LP-TLP) system is proposed to simulate the influence of CDE on the Ethernet integrated circuits, and the results are compared with conventional 100-ns TLP system. The experimental results have shown that the CDE robustness of NMOS device in a 0.25-mu m CMOS technology is much worse than its HBM electrostatic discharge robustness.en_US
dc.language.isoen_USen_US
dc.titleMethodology to evaluate the robustness of integrated circuits under Cable Discharge Eventen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2005 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, PROCEEDINGSen_US
dc.citation.spage499en_US
dc.citation.epage502en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000245210600108-
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