Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Wang, YY | en_US |
dc.contributor.author | Tsai, CJ | en_US |
dc.date.accessioned | 2014-12-08T15:25:23Z | - |
dc.date.available | 2014-12-08T15:25:23Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.isbn | 0-7803-8834-8 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/17774 | - |
dc.description.abstract | New generation of video codecs typically adopts a sophisticated interpolation filter for sub-pixel motion estimation (ME). For embedded applications, it is crucial to reduce both the memory requirement and the computational complexity for sub-pixel ME. The key observation in this paper is that the interpolation filter for motion estimation and the filter for coding do not have to be the same. By adopting a simpler on-the-fly interpolation filter during ME process and a standard-compliant filter for coding purpose, both memory and complexity can be reduced with very little coding performance degradation. Since Hadamard transformed-SAD is often used in high quality codecs as a better matching measure, we further show that the ME interpolation Mer can be combined with Hadamard transform for efficient VLSI implementation. Initial results show very promising performance of the proposed system. | en_US |
dc.language.iso | en_US | en_US |
dc.title | An efficient dual-interpolator architecture for subpixel motion estimation | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | en_US |
dc.citation.spage | 2907 | en_US |
dc.citation.epage | 2910 | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000232002402250 | - |
Appears in Collections: | Conferences Paper |