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dc.contributor.authorChi, HFen_US
dc.contributor.authorLai, ZHen_US
dc.date.accessioned2014-12-08T15:25:24Z-
dc.date.available2014-12-08T15:25:24Z-
dc.date.issued2005en_US
dc.identifier.isbn0-7803-8834-8en_US
dc.identifier.issn0271-4302en_US
dc.identifier.urihttp://hdl.handle.net/11536/17800-
dc.description.abstractThis paper presents an efficient computation scheme for the memory-based FFT/IFFT processor used in DMT (discrete multi-tone) systems. Only half-size FFT/IFFT is required to transform real-valued data and Hermitain symmetric data. That is, the cost in processing elements and memory can be reduced by two. Finally, a variable-size radix-4 memory-based FFT/IFFT processor with block scaling scheme is designed for DMT systems.en_US
dc.language.isoen_USen_US
dc.titleA cost-effective memory-based real-valued FFT and hermitian symmetric IFFT processor for DMT-based wire-line transmission systemsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGSen_US
dc.citation.spage6006en_US
dc.citation.epage6009en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000232002405164-
顯示於類別:會議論文