完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Chia-Pei | en_US |
dc.contributor.author | Li, Simon C. | en_US |
dc.contributor.author | Kao, Hong-Sing | en_US |
dc.contributor.author | Su, Chung-Chih | en_US |
dc.contributor.author | Wen, Kuei-Ann | en_US |
dc.date.accessioned | 2014-12-08T15:25:36Z | - |
dc.date.available | 2014-12-08T15:25:36Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.isbn | 0-7803-9162-4 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/17994 | - |
dc.identifier.uri | http://dx.doi.org/10.1109/ASSCC.2005.251734 | en_US |
dc.description.abstract | A single-chip tunable CMOS low-IF single-conversion receiver operated in the 915-MHz ISM band is proposed. A new 10.7-MHz IF section including a limiting amplifier and FM/FSK demodulator is employed. Near IF section sensitivity of -72 dBm, the demodulation constant of FM/FSK demodulator is 15 mV/kHz and the dynamic range of the limiting amplifier reaches 80dB. With on-chip tunable components in low power LNA and LC-tank VCO circuit, the receiver measures a RF gain of 15dB at 915-MHz, sensitivity of -80dBm at 0.1% BER, IIP3 of -9dBm, and NF of 5dB with current consumption of 33mA and a chip area of 6 mm(2). | en_US |
dc.language.iso | en_US | en_US |
dc.title | A single-chip low-power tunable CMOS low-IF single-conversion ISM receiver | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.doi | 10.1109/ASSCC.2005.251734 | en_US |
dc.identifier.journal | 2005 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, PROCEEDINGS OF TECHNICAL PAPERS | en_US |
dc.citation.spage | 337 | en_US |
dc.citation.epage | 340 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000240872200085 | - |
顯示於類別: | 會議論文 |