完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lin, TJ | en_US |
dc.contributor.author | Lee, CC | en_US |
dc.contributor.author | Liu, CW | en_US |
dc.contributor.author | Jen, CW | en_US |
dc.date.accessioned | 2014-12-08T15:25:38Z | - |
dc.date.available | 2014-12-08T15:25:38Z | - |
dc.date.issued | 2005 | en_US |
dc.identifier.isbn | 0-7803-9060-1 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18049 | - |
dc.description.abstract | This paper presents a novel register organization for VLIW DSPs. The simulation results show the performance of a DSP with the proposed register file is comparable with state-of-the-art DSPs. However, the proposed register file can save 89.7% area of a conventional centralized one, while reducing its access time by 68.6%. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A novel register organization for VLIW digital signal processors | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation & Test (VLSI-TSA-DAT), Proceedings of Technical Papers | en_US |
dc.citation.spage | 337 | en_US |
dc.citation.epage | 340 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000233985300087 | - |
顯示於類別: | 會議論文 |