完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLee, KBen_US
dc.contributor.authorLin, JYen_US
dc.contributor.authorJen, CWen_US
dc.date.accessioned2014-12-08T15:25:57Z-
dc.date.available2014-12-08T15:25:57Z-
dc.date.issued2004en_US
dc.identifier.urihttp://hdl.handle.net/11536/18398-
dc.description.abstractMPEG-4 shape coding comprises context-based arithmetic encoding (CAE) as its centerpiece. Since the CAE algorithm has complicated coding procedure and strong data dependency, it is hard to exploit its pipeline and parallel facilities. This paper presents a fast dual symbol CAE that runs at a higher clock rate whereas requires less clock cycle count for encoding. The proposed design is based on the unique characteristics of shape information as well as the numerical properties of the probabilities indexed by the contexts, and it is capable of encoding either a singe symbol or two symbols within each clock cycle. Together with the adaptive predication for the order of coding process, redundant operations can be skipped and therefore the average clock cycles for each coding process is improved by a factor of 1.72. Furthermore, the probability table is rearranged to reduce critical path delay. When synthesized from Verilog RTL design by using TSMC 0.35mum 1P4M CMOS technology, the design with I/O pads occupies an area of 2528 x 2520 mum(2) and is capable of running at 100 MHz.en_US
dc.language.isoen_USen_US
dc.titleA fast dual symbol context-based arithmetic coding for MPEG-4 shape codingen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGSen_US
dc.citation.spage317en_US
dc.citation.epage320en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000223124000080-
顯示於類別:會議論文