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dc.contributor.authorLee, KBen_US
dc.contributor.authorHsu, HCen_US
dc.contributor.authorJen, CWen_US
dc.date.accessioned2014-12-08T15:25:57Z-
dc.date.available2014-12-08T15:25:57Z-
dc.date.issued2004en_US
dc.identifier.urihttp://hdl.handle.net/11536/18401-
dc.description.abstractThis paper presents an efficient VLSI architecture of shape-adaptive discrete cosine transform (SA-DCT) for MPEG-4. The proposed architecture contains a cost-effective 1-D variable-length DCT engine and an auto-aligned transpose memory organization. Compared to other designs for SA-DCT, our architecture requires fewer multipliers whereas has higher throughout. Together with address generators and address pointers, the auto-aligned transpose memory organization can achieve transposing, shifting and aligning simultaneously without saving shape information. When clocking at 66.7 MHz, the proposed architecture has a throughput of 43.83 Mpixels/sec.en_US
dc.language.isoen_USen_US
dc.titleA cost-effective MPEG-4 shape-adaptive DCT with auto-aligned transpose memory organizationen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGSen_US
dc.citation.spage777en_US
dc.citation.epage780en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000223124000195-
Appears in Collections:Conferences Paper