完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Cheng, HW | en_US |
dc.contributor.author | Dung, LR | en_US |
dc.date.accessioned | 2014-12-08T15:26:16Z | - |
dc.date.available | 2014-12-08T15:26:16Z | - |
dc.date.issued | 2003 | en_US |
dc.identifier.isbn | 0-7803-7795-8 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18660 | - |
dc.description.abstract | Motion estimation is a key element in many video compression systems which tends to dominate computational and hence power requirements. With increasing demand of portable, power-aware multimedia devices, an architecture that can be flexible in both power consumption and compression quality is highly required. To meet the requirement, this paper presents a novel power-aware architecture, called the vario-power architecture, for motion estimation. Based on a semi-systolic array with content-based subsample algorithm, the architecture dynamically disable some processing elements to reduce the power consumption. By performing the edge extraction first, a threshold was then set as the criterion of whether to enable/disable processing elements and thus the switch activities of system can be reduced. As the result, the architecture may dynamically operate at different power consumption modes according to the remaining capacity of battery pack with little quality degradation. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A novel vario-power architecture of motion estimation using a content-based subsample algorithm | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | SIPS 2003: IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION | en_US |
dc.citation.spage | 201 | en_US |
dc.citation.epage | 206 | en_US |
dc.contributor.department | 電控工程研究所 | zh_TW |
dc.contributor.department | Institute of Electrical and Control Engineering | en_US |
dc.identifier.wosnumber | WOS:000188174000039 | - |
顯示於類別: | 會議論文 |