| 標題: | Failure analysis of ESD damage in a high-voltage driver IC and the effective ESD protection solution |
| 作者: | Ker, MD Peng, JJ Jiang, HC 電機學院 College of Electrical and Computer Engineering |
| 公開日期: | 2002 |
| URI: | http://hdl.handle.net/11536/18796 |
| ISBN: | 0-7803-7416-9 |
| 期刊: | PROCEEDINGS OF THE 9TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS |
| 起始頁: | 84 |
| 結束頁: | 89 |
| 顯示於類別： | 會議論文 |
- Active ESD Protection Design for Interface Circuits Between Separated Power Domains Against Cross-Power-Domain ESD Stresses / Chen, Shih-Hung;Ker, Ming-Dou;Hung, Hsiang-Pin
- Electrostatic Discharge Protection Design for High-Voltage Programming Pin in Fully-Silicided CMOS ICs / Ker, Ming-Dou;Chen, Wen-Yi;Shieh, Wuu-Trong;Wei, I-Ju
- Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs / Chen, Shih-Hung;Ker, Ming-Dou
- ESD protection design to overcome internal damage on interface circuits,of a CMOS IC with multiple separated power pins / Ker, MD;Chang, CY;Chang, YS
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