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dc.contributor.authorSung, CHen_US
dc.contributor.authorLee, KBen_US
dc.contributor.authorJen, CWen_US
dc.date.accessioned2014-12-08T15:26:36Z-
dc.date.available2014-12-08T15:26:36Z-
dc.date.issued2002en_US
dc.identifier.isbn0-7803-7363-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/18903-
dc.description.abstractA novel approach for scalable length Fast Fourier Transform (FFT) in single Processing Element (single PE) architecture has been developed. Scalable length FFT design meets the different lengths requirement of FFT operation in OFDM system [1]. An efficient mechanism that named Interleaved Rotated Data Allocation (IRDA) to replace multiple-port memory with single-port memory has also been proposed. Using single-port memory instead of multiple-port memory makes more area efficient.en_US
dc.language.isoen_USen_US
dc.titleDesign and implementation of a scalable fast Fourier transform coreen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2002 IEEE ASIA-PACIFIC CONFERENCE ON ASIC PROCEEDINGSen_US
dc.citation.spage295en_US
dc.citation.epage298en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000180272700074-
Appears in Collections:Conferences Paper