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dc.contributor.authorLiu, TMen_US
dc.contributor.authorShieh, BJen_US
dc.contributor.authorLee, CYen_US
dc.date.accessioned2014-12-08T15:26:37Z-
dc.date.available2014-12-08T15:26:37Z-
dc.date.issued2002en_US
dc.identifier.isbn0-7803-7448-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/18910-
dc.description.abstractIn this paper, the efficient modeling codec architecture for binary shape coding is presented. this novel design includes a memory unit that employs the Address Generation module and the Select & Barrel Shift module to speed up the process of border pixels generation. A simple architecture of the modified modeling unit, which uses a Column-scan map to reduce the number of mux and barrel shifter is proposed. Based on the proposed architecture, it deals with not only context computation of the intra mode but also it of the inter mode on the same hardware architecture. In addition, this design technique is suitable for the context-based arithmetic encode/decode in the whole MPEG4 codec system.en_US
dc.language.isoen_USen_US
dc.titleAn efficient modeling codec architecture for binary shape codingen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, PROCEEDINGSen_US
dc.citation.spage316en_US
dc.citation.epage319en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000186280700081-
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