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dc.contributor.authorLin, TJen_US
dc.contributor.authorJen, CWen_US
dc.date.accessioned2014-12-08T15:26:37Z-
dc.date.available2014-12-08T15:26:37Z-
dc.date.issued2002en_US
dc.identifier.isbn0-7803-7448-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/18919-
dc.description.abstractAs the complexity of embedded systems grows rapidly, it is common to accelerate critical tasks with hardware. Designers usually use off-the-shelf components or licensed IP cores to shorten the time to market, but the hardware/software interfacing is tedious, error-prone and usually not portable. Besides, the existing hardware seldom matches the requirements perfectly. CASCADE, the proposed design environment as an alternative, generates coprocessing datapaths from the executing algorithms specified in C/C++ and attaches these datapaths to the embedded processor with an auto-generated software driver. The number of datapaths and their internal parallel functional units are scaled to fit the application. It seamlessly integrates the design tools of the embedded processor to reduce the re-training/design efforts and maintains short product development time as the pure software approaches. A JPEG encoder is built in CASCADE successfully with an auto-generated four-MAC accelerator to achieve 623% performance boost for our video application.en_US
dc.language.isoen_USen_US
dc.titleCascade-configurable and scalable DSP environmenten_US
dc.typeProceedings Paperen_US
dc.identifier.journal2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV, PROCEEDINGSen_US
dc.citation.spage870en_US
dc.citation.epage873en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000186328300219-
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