完整後設資料紀錄
DC 欄位語言
dc.contributor.authorCHEN, BYen_US
dc.contributor.authorLEE, CLen_US
dc.date.accessioned2014-12-08T15:03:21Z-
dc.date.available2014-12-08T15:03:21Z-
dc.date.issued1995-06-01en_US
dc.identifier.issn0923-8174en_US
dc.identifier.urihttp://dx.doi.org/10.1007/BF00996439en_US
dc.identifier.urihttp://hdl.handle.net/11536/1899-
dc.description.abstractBased on the unate function theory, a universal test set for CMOS stuck-open faults in a functional block has been proposed in the existing literature. Thus, it is known that tests can be generated from the functional description and can detect all detectable stuck-open faults in any ''restricted CMOS circuit'' implementation of the function. However, the procedure to generate the tests involves a process of enumerating the expanded truth table of the function and comparing the vectors in the table. This is a very computationally demanding process. In this paper, a fast algorithm to generate the universal test set for CMOS circuits is presented. The algorithm generates the tests directly by Shannon-expanding and complementing the function, instead of the truth table enumerating. This greatly reduces the time complexity and the requirement of temporary memory. Besides, the algorithm represents the tests by ''cubes'' instead of the conventional ''patterns''. This also reduces the memory requirement for test-storing. Experimental results show that the algorithm achieves an improvement of up to six orders of magnitude in the computational efficiency and a saving of up to 2000-fold in the memory requirement for storing the tests when compared to other methods.en_US
dc.language.isoen_USen_US
dc.subjectAUTOMATIC TESTING GENERATIONen_US
dc.subjectCMOS CIRCUITSen_US
dc.subjectFUNCTIONAL TESTINGen_US
dc.subjectUNIVERSAL TEST SETen_US
dc.subjectSTUCK-OPEN FAULTSen_US
dc.titleUNIVERSAL TEST SET GENERATION FOR CMOS CIRCUITSen_US
dc.typeArticleen_US
dc.identifier.doi10.1007/BF00996439en_US
dc.identifier.journalJOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONSen_US
dc.citation.volume6en_US
dc.citation.issue3en_US
dc.citation.spage313en_US
dc.citation.epage323en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1995RU17600005-
dc.citation.woscount0-
顯示於類別:期刊論文