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| Compact layout rule extraction for latchup prevention in a 0.25-mu m shallow-trench-isolation silicided bulk CMOS process | 106 |
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| Compact layout rule extraction for latchup prevention in a 0.25-mu m shallow-trench-isolation silicided bulk CMOS process | 106 |
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| 檢視 | |
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| 中國 | 97 |
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|---|---|
| Shenzhen | 96 |
| Menlo Park | 6 |
| Kensington | 2 |
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