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dc.contributor.authorYang, JNen_US
dc.contributor.authorCheng, YCen_US
dc.contributor.authorHsu, TYen_US
dc.contributor.authorHsu, TRen_US
dc.contributor.authorLee, CYen_US
dc.date.accessioned2014-12-08T15:26:52Z-
dc.date.available2014-12-08T15:26:52Z-
dc.date.issued2001en_US
dc.identifier.isbn0-7803-7150-Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/19117-
dc.description.abstractA 1.75GHz CMOS inductor-less low noise amplifier with high-Q active inductor load using 0.35um. standard CMOS digital process is presented. In this low noise amplifier, the compact tunable high-Q active inductor load is connected to the common-gate configuration to improve the performance of the high power gain, low power consumption and simple matching characteristics. Not using any passive components is to reduce the area of chip and the complexity. HSPICE simulation has been performed to verify the performance of the designed low noise amplifier. It has been shown that the amplifier has a power gain of 24dB(S21), S11 of -31dB, S12 of -38.5dB and S22 of -21.4dB under 3.3V power supply with 9.3mW power consumption around at 1.75GHz center frequency. The experimental chip fabricated occupies 0.057x0.056 mm(2) chip area.en_US
dc.language.isoen_USen_US
dc.titleA 1.75GHz inductor-less CMOS low noise amplifier with high-Q active inductor loaden_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF THE 44TH IEEE 2001 MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2en_US
dc.citation.spage816en_US
dc.citation.epage819en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000175971700183-
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