完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chou, CS | en_US |
dc.contributor.author | Lin, DW | en_US |
dc.date.accessioned | 2014-12-08T15:27:12Z | - |
dc.date.available | 2014-12-08T15:27:12Z | - |
dc.date.issued | 1999 | en_US |
dc.identifier.isbn | 0-7803-5472-9 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/19421 | - |
dc.description.abstract | We consider several array signal processing architectures equipped with different training approaches and evaluate their performance in high-speed digital wireless transmission by way of computer simulation. The array architectures considered are: space-only, delay-combine, and multi-stage space-time. The training approaches considered include max-SINR, LS (least-squares) with channel estimation, and LS without channel estimation. These arrays are simpler than the full space-time architecture at the cost of a lower error-rate performance. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Performance of array signal processing algorithms for wideband digital wireless communication | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 4: IMAGE AND VIDEO PROCESSING, MULTIMEDIA, AND COMMUNICATIONS | en_US |
dc.citation.spage | 548 | en_US |
dc.citation.epage | 551 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000081715400136 | - |
顯示於類別: | 會議論文 |