標題: The design of high-performance 128Xi28 CMOS image sensors using new current-readout techniques
作者: Shih, YC
Wu, CY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1999
摘要: An 128x128 high-performance CMOS image sensor is designed by using shared-buffer direct injection (SBDI) biasing technique and shared off-focal-plane-array (off-FPA) integration capacitor structure [1]-[2]. Each pixel contains only a photodiode and a MOS switch. The pixel size is 30x30 mu m(2) and can be further shrunk. Due to the new SBDI biasing technique, the linearity and the dynamic range of the CMOS image sensor are increased. The use of shared off-FPA integration capacitor leads to large charge capacity and dynamic range. The CMOS image sensor has charge capacity of 5x10(7) electrons, transimpedance of 5x10(8) ohms at 20nA background current, and power dissipation of 30mW under 5V power supply. Moreover, the current-mode background suppression and dynamic discharge source follower output stage are proposed to further increase the signal dynamic range and improve the speed performance of output stage. The designed CMOS image sensor is fabricated by 0.5 mu m double-poly double-metal (DPDM) n-well CMOS technology. The function and performance of the proposed CMOS image sensor have been verified by experimental results.
URI: http://hdl.handle.net/11536/19422
ISBN: 0-7803-5471-0
期刊: ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 5: SYSTEMS, POWER ELECTRONICS, AND NEURAL NETWORKS
起始頁: 168
結束頁: 171
顯示於類別:會議論文