Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chen, SG | en_US |
dc.contributor.author | Chang, CC | en_US |
dc.date.accessioned | 2014-12-08T15:27:12Z | - |
dc.date.available | 2014-12-08T15:27:12Z | - |
dc.date.issued | 1999 | en_US |
dc.identifier.isbn | 0-7803-5471-0 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/19423 | - |
dc.description.abstract | The popular CORDIC-based SVDs suffer from the disadvantages of inherently sequential operations and requiring area-consuming barrel shifters. On the other hand, the basic-arithmetic SVD needs nasty division and square-root operations. To alleviate these problems, a new algorithm for SVD computation is proposed. Instead of using CORDIC algorithm, the new algorithm is based on multiplication-and-addition operations (without nasty division and square-root operations), combined with an approximate rotation and table lookup scheme, As a result, the new algorithm has a smaller computational complexity than those of the conventional SVD algorithms, in terms of number of addition operations. In realization, it also has a higher parallelism and smaller area than the conventional CORDIC-based SVD processors. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A new efficient algorithm for singular value decomposition | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 5: SYSTEMS, POWER ELECTRONICS, AND NEURAL NETWORKS | en_US |
dc.citation.spage | 523 | en_US |
dc.citation.epage | 526 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000081715600129 | - |
Appears in Collections: | Conferences Paper |