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| Novel input ESD protection circuit with substrate-triggering technique in a 0.25-mu m shallow-trench-isolation CMOS technology | 103 |
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| Novel input ESD protection circuit with substrate-triggering technique in a 0.25-mu m shallow-trench-isolation CMOS technology | 103 |
| 檢視 |
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| 檢視 | |
|---|---|
| 中國 | 99 |
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| Shenzhen | 97 |
| Kensington | 2 |
| Menlo Park | 2 |
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