標題: Novel low power Class-B output buffer
作者: Yu, PC
Wu, JC
電機學院
電子工程學系及電子研究所
College of Electrical and Computer Engineering
Department of Electronics Engineering and Institute of Electronics
公開日期: 1998
摘要: This paper describes the design of a Class-B output buffer for driving large capacitance load in flat panel display. Due to the large number of output buffers on a column driver chip, the quiescent current of the output buffer must be reduced. A comparator which produces full-swing output is used in the negative feedback path to eliminate quiescent current in the last stage. The proposed circuit was implemented in a 0.8 mu m CMOS process. The measured maximum static current is 54 mu A. With 5V supply voltage and 600pF load, the tracking error voltage is less than +/-8mV and the output swing is from 0.5V to 5V. The settling time for 4V swing to 0.2% is 8 mu s, which is more than adequate for driving 1204*1280 pixels LCD panel with 86Hz frame rate.
URI: http://hdl.handle.net/11536/19551
ISBN: 0-7803-4455-3
期刊: ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6
起始頁: E633
結束頁: E636
顯示於類別:會議論文