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dc.contributor.authorSu, CLen_US
dc.contributor.authorHwang, YTen_US
dc.contributor.authorJen, CWen_US
dc.date.accessioned2014-12-08T15:27:23Z-
dc.date.available2014-12-08T15:27:23Z-
dc.date.issued1997en_US
dc.identifier.isbn0-7803-3583-Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/19634-
dc.description.abstractIn this paper, we adopt the Signed Digit (SD) number system and the Distributed Arithmetic (DA) computing scheme to achieve a novel design of high throughput recursive digital filters. The SD system enables a carry-propagation free addition as well as the most-significance-digit (MSD) first computation. Based on these properties, we devise a recursive computing scheme which successfully reduces the initiation interval to the delay of computing one digit instead of the entire word. Combined with the DA scheme, we can further exploit the bit-level parallelism while maintain a low circuit complexity. We design a Signed Digit Multi-Operand Adders (SDMA) array as the building block to implement the SD-DA algorithm. It can compute an inner product operation efficiently and suit well to VLSI implementation.en_US
dc.language.isoen_USen_US
dc.titleA novel recursive digital filter based on signed digit distributed arithmeticen_US
dc.typeProceedings Paperen_US
dc.identifier.journalISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGEen_US
dc.citation.spage2104en_US
dc.citation.epage2107en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1997BJ47Z00527-
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