標題: | Instruction folding in Java processor |
作者: | Ton, LR Chang, LC Rao, MF Tseng, HM Shang, SS Ma, RL Wang, DC Chung, CP 資訊工程學系 Department of Computer Science |
關鍵字: | Java processor;stack machine;stack operations folding |
公開日期: | 1997 |
摘要: | Traditionally, the performance of a stack machine was limited by the true data dependency. A performance enhancement mechanism - Stack Operations Folding - was used in Srm Microelectronics' picoJava design [1][2] and it can reduce up to 60% of all stack operations. in this paper, we use the Java bytecode language as the targe; machine language, and study its instruction folding on a proposed machine model. Three folding strategies: 2-foldable, 3-foldable and 4-foldable, were simulated and evaluated. Statistical data show that our third folding strategy eliminates 73% of all stack operations, and each strategy fins an overall program speedup of 1.19, 1.25 and 1.26, respectively, as compared to a traditional stack machine. Moreover, a Java machine model suitable for instruction folding, together with its pipeline stages, are presented. lt seems to have the best cost/performance effectiveness of a Java stack machine if six bytes decoder width and the second folding strategy - the three-foldable strategy - are adopted. |
URI: | http://hdl.handle.net/11536/19674 |
ISBN: | 0-8186-8227-2 |
期刊: | 1997 INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED SYSTEMS, PROCEEDINGS |
起始頁: | 138 |
結束頁: | 143 |
顯示於類別: | 會議論文 |