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dc.contributor.authorCheng, SCen_US
dc.contributor.authorHang, HMen_US
dc.date.accessioned2014-12-08T15:27:27Z-
dc.date.available2014-12-08T15:27:27Z-
dc.date.issued1997en_US
dc.identifier.isbn0-8186-8183-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/19711-
dc.description.abstractThis paper presents an evaluation of rate control algorithms from a system-level VLSI design viewpoint. Rate control in video coding has a significant influence on the coded bits and image quality. Many rate control algorithms have been proposed mainly focusing on the optimal rate-distortion performance without considering their overall performance on the VLSI implementation. However, a system-level designer should design an algorithm not only good in performance but also good in implementation. In this paper, three different types of popular rate control algorithms have been analyzed based on their picture quality, the internal buffer size and the hardware cost. The methodology and results presented here should provide useful guidelines for selecting an appropriate rate control algorithm for system-level VLSI design.en_US
dc.language.isoen_USen_US
dc.titleThe impact of rate control algorithms on video codec hardware designen_US
dc.typeProceedings Paperen_US
dc.identifier.journalINTERNATIONAL CONFERENCE ON IMAGE PROCESSING - PROCEEDINGS, VOL IIen_US
dc.citation.spage807en_US
dc.citation.epage810en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1997BJ90B00204-
Appears in Collections:Conferences Paper