Investigation of high-power device and process for field emission display

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DC Field	Value	Language
dc.contributor.author	Yeh, CF	en_US
dc.contributor.author	Liu, JS	en_US
dc.contributor.author	Huang, CM	en_US
dc.date.accessioned	2014-12-08T15:27:39Z	-
dc.date.available	2014-12-08T15:27:39Z	-
dc.date.issued	1996	en_US
dc.identifier.isbn	0-7803-3594-5	en_US
dc.identifier.uri	http://hdl.handle.net/11536/19906	-
dc.description.abstract	A method of fabricating a semiconductor device including a high withstanding voltage lateral CMOS and a standard logic CMOS is developed for field emission display. Structure, process and simulation by TSUPREM and MEDICI will be discussed in this paper.	en_US
dc.language.iso	en_US	en_US
dc.title	Investigation of high-power device and process for field emission display	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	IVMC '96 - 9TH INTERNATIONAL VACUUM MICROELECTRONICS CONFERENCE, TECHNICAL DIGEST	en_US
dc.citation.spage	628	en_US
dc.citation.epage	630	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:A1996BJ05U00142	-
Appears in Collections:	Conferences Paper