完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lu, Cheng-Hsien | en_US |
dc.contributor.author | Cheng, Chuan-An | en_US |
dc.contributor.author | Ho, Chia-Hua | en_US |
dc.contributor.author | Chen, Kuan-Neng | en_US |
dc.date.accessioned | 2014-12-08T15:28:55Z | - |
dc.date.available | 2014-12-08T15:28:55Z | - |
dc.date.issued | 2012-10-01 | en_US |
dc.identifier.issn | 1533-4880 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1166/jnn.2012.6602 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/20891 | - |
dc.description.abstract | This research is to investigate the effects of bonding technology and thinning process on the electrical properties of 0.35 mu m technology node n-MOSFET devices. After the bonding process, by changing the bonding temperature up to 400 degrees C and bonding force up to 2.5 x 10(5) Pa, these devices still have the same electrical performances. In addition, thinning process was applied to investigate the stress which would affect the electrical properties of n-MOSFETs. The electrical performances of devices do not change for substrate thickness larger than 466 mu m. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | n-MOSFET Devices | en_US |
dc.subject | Integration | en_US |
dc.subject | Bonding Technology | en_US |
dc.subject | Thinning Process | en_US |
dc.title | Effects of Bonding Technology and Thinning Process in Three-Dimensional Integration on Device Characteristics | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1166/jnn.2012.6602 | en_US |
dc.identifier.journal | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | en_US |
dc.citation.volume | 12 | en_US |
dc.citation.issue | 10 | en_US |
dc.citation.spage | 8050 | en_US |
dc.citation.epage | 8054 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000312620200058 | - |
dc.citation.woscount | 1 | - |
顯示於類別: | 期刊論文 |