Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Dai, Chih-Hao | en_US |
dc.contributor.author | Chang, Ting-Chang | en_US |
dc.contributor.author | Chu, An-Kuo | en_US |
dc.contributor.author | Kuo, Yuan-Jui | en_US |
dc.contributor.author | Jian, Fu-Yen | en_US |
dc.contributor.author | Lo, Wen-Hung | en_US |
dc.contributor.author | Ho, Szu-Han | en_US |
dc.contributor.author | Chen, Ching-En | en_US |
dc.contributor.author | Chung, Wan-Lin | en_US |
dc.contributor.author | Shih, Jou-Miao | en_US |
dc.contributor.author | Xia, Guangrui | en_US |
dc.contributor.author | Cheng, Osbert | en_US |
dc.contributor.author | Huang, Cheng-Tung | en_US |
dc.date.accessioned | 2014-12-08T15:31:00Z | - |
dc.date.available | 2014-12-08T15:31:00Z | - |
dc.date.issued | 2011-07-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LED.2011.2142412 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/22109 | - |
dc.description.abstract | This letter systematically investigates the origin of gate-induced floating-body effect (GIFBE) in partially depleted silicon-on-insulator p-type MOSFETs. The experimental results indicate that GIFBE causes a reduction in the electrical oxide field, leading to an underestimate of negative-bias temperature instability degradation. This can be partially attributed to the electrons tunneling from the process-induced partial n(+) polygate. However, based on different operation conditions, we found that the dominant origin of electrons was strongly dependent on holes in the inversion layer under source/drain grounding. This suggests that the mechanism of GIFBE at higher voltages is dominated by the proposed anode electron injection model, rather than the electron valence band tunneling widely accepted as the mechanism for n-MOSFETs. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | EVB tunneling | en_US |
dc.subject | gate-induced floating-body effect (GIFBE) | en_US |
dc.subject | negative-bias temperature instability (NBTI) | en_US |
dc.subject | silicon-on-insulator (SOI) | en_US |
dc.title | On the Origin of Gate-Induced Floating-Body Effect in PD SOI p-MOSFETs | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LED.2011.2142412 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 32 | en_US |
dc.citation.issue | 7 | en_US |
dc.citation.spage | 847 | en_US |
dc.citation.epage | 849 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000292165200005 | - |
dc.citation.woscount | 17 | - |
Appears in Collections: | Articles |
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