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dc.contributor.authorWu, Su-Haoen_US
dc.contributor.authorWu, Jieh-Tsorngen_US
dc.date.accessioned2014-12-08T15:33:11Z-
dc.date.available2014-12-08T15:33:11Z-
dc.date.issued2013en_US
dc.identifier.isbn978-1-4799-0620-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/23067-
dc.description.abstractThis work develops an integrator-leakage calibration technique for the switched-capacitor integrators in a delta-sigma modulator (DSM). Integrators that are realized with low-gain opamps are lossy. A DSM that uses lossy integrators exhibits a degraded signal-to-quantization-noise ratio. In the calibration of an integrator, its integration leakage is determined in the digital domain, and the leakage compensation is applied to the same integrator in the analog domain. The proposed scheme can be used to calibrate all of the integrators in a discrete-time DSM of any form. It can be performed in the background without interrupting the normal operation of the DSM.en_US
dc.language.isoen_USen_US
dc.titleBackground Calibration of Integrator Leakage in Discrete-Time Delta-Sigma Modulatorsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2013 IEEE 11TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000327392600048-
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