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dc.contributor.authorYen, Ta-Kanen_US
dc.contributor.authorKuo, Hsien-Kaien_US
dc.contributor.authorLai, Bo-Cheng Charlesen_US
dc.date.accessioned2014-12-08T15:33:13Z-
dc.date.available2014-12-08T15:33:13Z-
dc.date.issued2013en_US
dc.identifier.isbn978-1-4673-4436-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/23099-
dc.description.abstractGPGPUs have emerged as one of the most widely used throughput processors. Deep multithreading and cache hierarchy are the two effective implementations to achieve high throughput computing in modern GPGPUs. However, these are two conflicting design options. Finding a proper design point between the two has become a significant performance factor to GPGPUs. This paper proposes a distributed thread scheduler for dynamic multithreading on GPGPUs. By demonstrating the trade-off issue between the multithreading and cache contention, the proposed scheduler dynamically adjusts the multithreading degree to achieve superior performance. With the proposed scheduler, the cache misses can be decreased by 20.6% and 37.9% on the L1 and L2 cache respectively. The overall performance can be enhanced by an average of 16.4%.en_US
dc.language.isoen_USen_US
dc.titleA Distributed Thread Scheduler for Dynamic Multithreading on Throughput Processorsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2013 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000326882100020-
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