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dc.contributor.authorLin, Chun-Yien_US
dc.contributor.authorLiang, Ching-Piaoen_US
dc.contributor.authorRao, Pei-Zongen_US
dc.contributor.authorChung, Shyh-Jongen_US
dc.date.accessioned2014-12-08T15:33:15Z-
dc.date.available2014-12-08T15:33:15Z-
dc.date.issued2012en_US
dc.identifier.isbn978-1-934142-20-2en_US
dc.identifier.issn1559-9450en_US
dc.identifier.urihttp://hdl.handle.net/11536/23140-
dc.description.abstractThis paper presents the analysis and design of a triple-band low-noise amplifier (LNA) fabricated in a 0.18 mu m CMOS process. The triple-band operation is achieved by adding a switch component in a dual-band input network of an LNA, so that it can function at 2.5, 3.5, and 5.2 GHz. The proposed method can effectively decrease the chip area as compared to conventional designs. In addition, based on the design procedures provided in this paper, the component values of the triple-band input network can be accurately calculated to reduce the complication of the circuit design.en_US
dc.language.isoen_USen_US
dc.titleAnalysis and Design of Triple-band Input Matching for CMOS Low-noise Amplifieren_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF PROGRESS IN ELECTROMAGNETICS RESEARCH SYMPOSIUM (PIERS 2012)en_US
dc.citation.spage888en_US
dc.citation.epage891en_US
dc.contributor.department傳播研究所zh_TW
dc.contributor.departmentInstitute of Communication Studiesen_US
dc.identifier.wosnumberWOS:000327380000187-
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