完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Hsiao, Yu-Chih | en_US |
dc.contributor.author | Meng, Chinchun | en_US |
dc.contributor.author | Wu, Po-Yi | en_US |
dc.contributor.author | Huang, Guo-wei | en_US |
dc.date.accessioned | 2014-12-08T15:34:49Z | - |
dc.date.available | 2014-12-08T15:34:49Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.isbn | 978-1-4799-1472-2 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/23701 | - |
dc.description.abstract | A miniaturized phase-inverter rat-race and its wideband Gilbert up-converter is demonstrated in 0.13-mu m CMOS technology. The common-mode LO leakage can be absorbed by the isolated port of the rat-race coupler while the rate-race employed at RF port to combine the mixer differential output. A phase-inverter rat-race coupler with a stacked spiral-shape coplanar stripline (CPS) by multi-layer metals can highly reduce the chip size. Finally, the experimental results of up-converter shows the 1-dB conversion gain and 15 GHz RF bandwidth. The IF-to-RF isolation is about 50 dB and LO-to-RF isolation is about 23 dB, respectively. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | up-converter | en_US |
dc.subject | phase inverter | en_US |
dc.subject | rat-race coupler | en_US |
dc.title | 15 GHz Wideband CMOS Gilbert Up-Converter With Stacked Spiral-CPS Phase-Inverter Rat-Race Coupler at RF Port | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2013 ASIA-PACIFIC MICROWAVE CONFERENCE PROCEEDINGS (APMC 2013) | en_US |
dc.citation.spage | 179 | en_US |
dc.citation.epage | 181 | en_US |
dc.contributor.department | 電機資訊學士班 | zh_TW |
dc.contributor.department | Undergraduate Honors Program of Electrical Engineering and Computer Science | en_US |
dc.identifier.wosnumber | WOS:000330851900057 | - |
顯示於類別: | 會議論文 |