HETEROJUNCTION BIPOLAR-TRANSISTORS WITH EMITTER BARRIER LOWERED BY DELTA-DOPING

doi:10.1109/55.296218

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	CHEN, HR	en_US
dc.contributor.author	HUANG, CH	en_US
dc.contributor.author	CHANG, CY	en_US
dc.contributor.author	LEE, CP	en_US
dc.contributor.author	TSAI, KL	en_US
dc.contributor.author	TSANG, JS	en_US
dc.date.accessioned	2014-12-08T15:03:52Z	-
dc.date.available	2014-12-08T15:03:52Z	-
dc.date.issued	1994-08-01	en_US
dc.identifier.issn	0741-3106	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/55.296218	en_US
dc.identifier.uri	http://hdl.handle.net/11536/2387	-
dc.description.abstract	An Npn heterojunction bipolar transistor with a Si-delta-doped layer at the emitter-base hetero-interface is demonstrated. The Si delta-doped layer reduces the potential spike at the emitter junction. This design reserves the abruptness of the heterojunction, reduces electron barrier and increases the hole barrier simultaneously. Experimental results show that the HBT's turn-on characteristics are greatly improved while the current gain remains high. The offset voltages as low as 44 mV have been obtained. Very high current gains at very low collector current densities are obtained.	en_US
dc.language.iso	en_US	en_US
dc.title	HETEROJUNCTION BIPOLAR-TRANSISTORS WITH EMITTER BARRIER LOWERED BY DELTA-DOPING	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/55.296218	en_US
dc.identifier.journal	IEEE ELECTRON DEVICE LETTERS	en_US
dc.citation.volume	15	en_US
dc.citation.issue	8	en_US
dc.citation.spage	286	en_US
dc.citation.epage	288	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:A1994PB03100008	-
dc.citation.woscount	24	-
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