Design of high-voltage-tolerant stimulus driver with adaptive loading consideration to suppress epileptic seizure in a 0.18-mu m CMOS process
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10.1007/s10470-014-0282-4
Abstract
A novel design of high-voltage-tolerant stimulus driver for epileptic seizure suppression with low power design and adaptive loading consideration is proposed in this work. The proposed design can deliver the required stimulus current within a specific range of loading impedance. Besides, this design in 0.18-mu m low-voltage CMOS process can be operated with high supply voltage (VCC) of 5-10 V without using the high-voltage transistors, and the process steps of high-voltage transistors can be reduced. The proposed design can be further integrated for an electronic epilepsy prosthetic system-on-chip.