標題: A 1.2V Interference-Sturdiness, DC-Offset Calibrated CMOS Receiver Utilizing a Current-Mode Filter for UWB
作者: Shih, Horng-Yuan
Chen, Wei-Hsien
Juang, Kai-Chenug
Yang, Tzu-Yi
Kuo, Chien-Nan
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2008
摘要: An interference-sturdiness receiver with a current-mode filter for 3-5GHz UWB applications is implemented in a 1.2V 0.13 mu m CMOS process. The chip provides a maximum voltage gain of 70dB and a dynamic range of 60dB. The measured in-band OIP3 is +9.39dBm, out-of-band IIP3 -15dBm and noise figure 6.8dB in the maximum gain mode. An algorithm for the automatic digital DC offset calibration is also demonstrated.
URI: http://hdl.handle.net/11536/2452
ISBN: 978-1-4244-2604-1
期刊: 2008 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE
起始頁: 341
結束頁: 344
顯示於類別:會議論文