完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLin, C. I.en_US
dc.contributor.authorLin, H. C.en_US
dc.contributor.authorHuang, T. Y.en_US
dc.date.accessioned2014-12-08T15:36:14Z-
dc.date.available2014-12-08T15:36:14Z-
dc.date.issued2012en_US
dc.identifier.isbn978-1-60768-356-8en_US
dc.identifier.issn1938-5862en_US
dc.identifier.urihttp://hdl.handle.net/11536/24565-
dc.identifier.urihttp://dx.doi.org/10.1149/05008.0023ecsten_US
dc.description.abstractIn this work, we study the electrical characteristics of planar poly-Si junctionless (JL) thin-film transistors (TFTs) with 10 nm-thick channel and various gate width. The output current of JL devices is drastically larger than that of the control device with an undoped channel, owing to the abundant carriers contained in the channel of the JL devices which tends to reduce both channel and source/drain series resistances. Subthreshold swing of the JL devices is found to be larger than the control ones, owing to the existence of a depletion layer in the channel. Nonetheless, excellent on/off current ratio (>10(7)) is achieved, thanks to the use of the ultra-thin channel.en_US
dc.language.isoen_USen_US
dc.titleCharacteristics of N-Type Planar Junctionless Poly-Si Thin-Film Transistorsen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1149/05008.0023ecsten_US
dc.identifier.journalTHIN FILM TRANSISTORS 11 (TFT 11)en_US
dc.citation.volume50en_US
dc.citation.issue8en_US
dc.citation.spage23en_US
dc.citation.epage28en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000337788900003-
顯示於類別:會議論文