標題: | Implementation of Film Profile Engineering in the Fabrication of ZnO Thin-Film Transistors |
作者: | Lyu, Rong-Jhe Lin, Horng-Chih Huang, Tiao-Yuan 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Film profile engineering (FPE);metal oxide;thin-film transistors (TFTs);ZnO |
公開日期: | 1-May-2014 |
摘要: | A novel approach, which can delicately form a desirable film profile for deposited gate oxide, channel, and source/drain contacts of oxide-based thin-film transistors (TFTs) is proposed. To demonstrate the film-profile engineering concept used in this approach, a simple one-mask process was developed for fabricating ZnO TFTs with submicrometer channel length. The fabrication takes advantage of a suspended bridge hanging across the device to tailor the desirable profile of deposited films with proper tools. The fabricated devices show high ON/OFF current ratio (>10(9)), steep subthreshold swing (71-187 mV/decade), and high mobility (21-45 cm(2)/V.s). Very small variation in device characteristics among the devices with the same channel dimensions is also confirmed. |
URI: | http://dx.doi.org/10.1109/TED.2014.2313344 http://hdl.handle.net/11536/24727 |
ISSN: | 0018-9383 |
DOI: | 10.1109/TED.2014.2313344 |
期刊: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
Volume: | 61 |
Issue: | 5 |
起始頁: | 1417 |
結束頁: | 1422 |
Appears in Collections: | Articles |
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