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dc.contributor.authorLyu, Rong-Jheen_US
dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.date.accessioned2014-12-08T15:36:24Z-
dc.date.available2014-12-08T15:36:24Z-
dc.date.issued2014-05-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2014.2313344en_US
dc.identifier.urihttp://hdl.handle.net/11536/24727-
dc.description.abstractA novel approach, which can delicately form a desirable film profile for deposited gate oxide, channel, and source/drain contacts of oxide-based thin-film transistors (TFTs) is proposed. To demonstrate the film-profile engineering concept used in this approach, a simple one-mask process was developed for fabricating ZnO TFTs with submicrometer channel length. The fabrication takes advantage of a suspended bridge hanging across the device to tailor the desirable profile of deposited films with proper tools. The fabricated devices show high ON/OFF current ratio (>10(9)), steep subthreshold swing (71-187 mV/decade), and high mobility (21-45 cm(2)/V.s). Very small variation in device characteristics among the devices with the same channel dimensions is also confirmed.en_US
dc.language.isoen_USen_US
dc.subjectFilm profile engineering (FPE)en_US
dc.subjectmetal oxideen_US
dc.subjectthin-film transistors (TFTs)en_US
dc.subjectZnOen_US
dc.titleImplementation of Film Profile Engineering in the Fabrication of ZnO Thin-Film Transistorsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2014.2313344en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume61en_US
dc.citation.issue5en_US
dc.citation.spage1417en_US
dc.citation.epage1422en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000337753300029-
dc.citation.woscount0-
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