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dc.contributor.authorChen, YCen_US
dc.contributor.authorWang, PCen_US
dc.contributor.authorLee, CLen_US
dc.contributor.authorChan, CTen_US
dc.date.accessioned2014-12-08T15:36:41Z-
dc.date.available2014-12-08T15:36:41Z-
dc.date.issued2005en_US
dc.identifier.isbn3-540-25338-6en_US
dc.identifier.issn0302-9743en_US
dc.identifier.urihttp://hdl.handle.net/11536/25044-
dc.description.abstractPacket classification is important in fulfilling the requirements of differentiated services in next generation networks. In the previous work, we presented an efficient hardware scheme, Condensate Bit Vector, based on bit vectors. The scheme significantly improves the scalability of packet classification. In this work, the characteristics of Condensate Bit Vector are further illustrated, and two drawbacks that may negatively affect the performance of Condensate Bit Vector are revealed. We show the solution to resolve the weaknesses and introduce the new schemes, Condensate Ordered Bit Vector and Condensate and Aggregate Ordered Bit Vector. Experiments show that our new algorithms drastically improve the search speed as compared to the original algorithm.en_US
dc.language.isoen_USen_US
dc.titlePerformance improvement of hardware-based packet classification algorithmen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.journalNETWORKING - ICN 2005, PT 2en_US
dc.citation.volume3421en_US
dc.citation.spage728en_US
dc.citation.epage736en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000229083500082-
顯示於類別:會議論文