A SYSTOLIC DESIGN FOR GENERATING PERMUTATIONS IN LEXICOGRAPHIC ORDER

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	LEE, WP	en_US
dc.contributor.author	TSAY, JC	en_US
dc.date.accessioned	2014-12-08T15:04:01Z	-
dc.date.available	2014-12-08T15:04:01Z	-
dc.date.issued	1994-05-01	en_US
dc.identifier.issn	0167-8191	en_US
dc.identifier.uri	http://hdl.handle.net/11536/2522	-
dc.description.abstract	In this paper, we shall design a systolic algorithm for generating all N! permutations of N objects. The algorithm is time efficient, generates all permutations in lexicographic order, and can be executed on a simple computation model (systolic array). Furthermore, because the algorithm is systolic, it is suitable for VLSI implementation.	en_US
dc.language.iso	en_US	en_US
dc.subject	COMBINATORIAL OBJECTS	en_US
dc.subject	LEXICOGRAPHIC ORDER	en_US
dc.subject	PERMUTATION GENERATION	en_US
dc.subject	SYSTOLIC ALGORITHM	en_US
dc.subject	VLSI	en_US
dc.title	A SYSTOLIC DESIGN FOR GENERATING PERMUTATIONS IN LEXICOGRAPHIC ORDER	en_US
dc.type	Article	en_US
dc.identifier.journal	PARALLEL COMPUTING	en_US
dc.citation.volume	20	en_US
dc.citation.issue	5	en_US
dc.citation.spage	775	en_US
dc.citation.epage	785	en_US
dc.contributor.department	工學院	zh_TW
dc.contributor.department	College of Engineering	en_US
dc.identifier.wosnumber	WOS:A1994NN54600005	-
dc.citation.woscount	3	-
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