標題: | A systematic approach for the sequence controller design in manufacturing systems |
作者: | Lee, JS Hsu, PL 電控工程研究所 Institute of Electrical and Control Engineering |
關鍵字: | IDEF0;ladder logic diagrams;manufacturing systems;Petri nets;programmable logic controllers;sequence controllers |
公開日期: | 2005 |
摘要: | This paper presents a systematic approach for the design and implementation of the sequence controller in manufacturing systems. By employing the IDEF0, we construct the simplified Petri net controller (SPNC) through the material flow diagram and the information flow diagram. Then, the ladder logic diagram (LLD) can be transformed from the SPNC through the token passing logic (TPL). The proposed approach, including the IDEF0, SPNC, and TPL tools, leads to the standard IEC1131-3 LLD for PLC implementation. Finally, an application of a stamping process is provided to illustrate the design procedure of the developed approach. |
URI: | http://hdl.handle.net/11536/25277 http://dx.doi.org/10.1007/s00170-003-1902-9 |
ISSN: | 0268-3768 |
DOI: | 10.1007/s00170-003-1902-9 |
期刊: | INTERNATIONAL JOURNAL OF ADVANCED MANUFACTURING TECHNOLOGY |
Volume: | 25 |
Issue: | 7-8 |
起始頁: | 754 |
結束頁: | 760 |
顯示於類別: | 期刊論文 |