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dc.contributor.authorChen, Yung-Yuen_US
dc.contributor.authorHsieh, Chih-Renen_US
dc.contributor.authorChiu, Fang-Yuen_US
dc.date.accessioned2014-12-08T15:37:37Z-
dc.date.available2014-12-08T15:37:37Z-
dc.date.issued2011-01-17en_US
dc.identifier.issn0003-6951en_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.3541878en_US
dc.identifier.urihttp://hdl.handle.net/11536/25875-
dc.description.abstractCharge trapping and detrapping characteristics of Si(3)N(4) contact etch stop layer (SiN CESL) uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor (nMOSFET) with fluorinated HfO(2)/SiON gate stack have been investigated for the first time. Smaller threshold voltage shift can consequently obtain for the SiN CESL strained nMOSFET with fluorinated HfO(2)/SiON gate stack, primarily due to passivation of oxygen vacancies and dangling bonds by either nitrogen or fluorine atoms. However, the SiN CESL strained nMOSFET with fluorinated gate stack inevitably exhibits less charge detrapping ratio, which means greater part of stress-induced charges would remain in the gate stack after nitrogen or fluorine incorporation, respectively. (c) 2011 American Institute of Physics. [doi:10.1063/1.3541878]en_US
dc.language.isoen_USen_US
dc.titleConstant voltage stress induced charge trapping and detrapping characteristics of the Si(3)N(4) uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor with fluorinated HfO(2)/SiON gate stacken_US
dc.typeArticleen_US
dc.identifier.doi10.1063/1.3541878en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.citation.volume98en_US
dc.citation.issue3en_US
dc.citation.spageen_US
dc.citation.epageen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
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