完整後設資料紀錄
DC 欄位語言
dc.contributor.authorHuang, Chen-Shuoen_US
dc.contributor.authorLiu, Po-Tsunen_US
dc.date.accessioned2014-12-08T15:37:52Z-
dc.date.available2014-12-08T15:37:52Z-
dc.date.issued2011en_US
dc.identifier.issn1099-0062en_US
dc.identifier.urihttp://hdl.handle.net/11536/26040-
dc.identifier.urihttp://dx.doi.org/10.1149/1.3551463en_US
dc.description.abstractIn this study, negative-bias-temperature-instability (NBTI) stress induced interface, and bulk states of polycrystalline silicon (poly-Si) film were identified by using gated poly-Si P-intrinsic-N (PIN) diodes. The generation of reverse current was proportional to the quantity of defects in the poly-Si of the gated diode device. Experimental results revealed NBTI degradation has a spatial distribution in the poly-Si film and demonstrated that the resultant generation of poly-Si bulk states causes the elevated drain leakage current of thin-film transistors (TFTs). We conclude that grain boundaries, with enriched hydrogenated silicon bonds in the bulk of poly-Si, interact electrochemically with hole-carriers. (C) 2011 The Electrochemical Society. [DOI: 10.1149/1.3551463] All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleImpact of Negative-Bias-Temperature-Instability on Channel Bulk of Polysilicon TFT by Gated PIN Diode Analysisen_US
dc.typeArticleen_US
dc.identifier.doi10.1149/1.3551463en_US
dc.identifier.journalELECTROCHEMICAL AND SOLID STATE LETTERSen_US
dc.citation.volume14en_US
dc.citation.issue5en_US
dc.citation.spageH194en_US
dc.citation.epageH196en_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.department顯示科技研究所zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
dc.contributor.departmentInstitute of Displayen_US
dc.identifier.wosnumberWOS:000288128800023-
dc.citation.woscount0-
顯示於類別:期刊論文