完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Cheng, Shau-Yu | en_US |
dc.contributor.author | Tsai, Chueh-An | en_US |
dc.contributor.author | Hsu, Terng-Yin | en_US |
dc.date.accessioned | 2014-12-08T15:38:09Z | - |
dc.date.available | 2014-12-08T15:38:09Z | - |
dc.date.issued | 2011-01-01 | en_US |
dc.identifier.issn | 1063-8210 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TVLSI.2009.2031137 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/26166 | - |
dc.description.abstract | Without a cyclic prefix (CP), most single-carrier (SC) transmissions can not adopt frequency-domain equalizer (FDE) directly. This work utilizes frequency-domain channel estimator (FD-CE) and decision-feedback aliasing canceller (DF-AC) to produce single-FFT SC-FDE. In this way, non-CP single-carrier block transmission (SCBT) can be decoded using sphere decoder of MIMO-OFDM modems to support multimode and backward compatibility under an acceptable complexity in IEEE 802.11 very high throughput (VHT). An N-point FFT is sufficient to measure channel frequency responses (CFR) from L-sample preambles (L <= N/2). And then, M-bit block codes (M <= L) are decodable over frequency domains with DF-AC's help. Simulations and measurements imply that this work can ensure adequate performance, even if there is no CP existed against the distortions of multipath propagation. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Aliasing canceller | en_US |
dc.subject | channel estimator | en_US |
dc.subject | compatibility | en_US |
dc.subject | multimode | en_US |
dc.subject | single-carrier block transmission (SCBT) | en_US |
dc.subject | single-carrier frequency-domain equalization (SC-FDE) | en_US |
dc.title | Channel Estimator and Aliasing Canceller for Equalizing and Decoding Non-Cyclic Prefixed Single-Carrier Block Transmission via MIMO-OFDM Modem | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TVLSI.2009.2031137 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | en_US |
dc.citation.volume | 19 | en_US |
dc.citation.issue | 1 | en_US |
dc.citation.spage | 156 | en_US |
dc.citation.epage | 160 | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000285844200017 | - |
dc.citation.woscount | 0 | - |
顯示於類別: | 期刊論文 |