ANALYSIS OF BILATERAL LATCH-UP TRIGGERING IN VLSI CIRCUITS

標題:	ANALYSIS OF BILATERAL LATCH-UP TRIGGERING IN VLSI CIRCUITS
作者:	HUANG, HS CHANG, CY HSU, CC CHEN, KL LIN, JK 電控工程研究所 Institute of Electrical and Control Engineering
公開日期:	1-二月-1994
URI:	http://hdl.handle.net/11536/2625
ISSN:	0038-1101
期刊:	SOLID-STATE ELECTRONICS
Volume:	37
Issue:	2
起始頁:	380
結束頁:	382
顯示於類別：	期刊論文