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| Evaluation of Static Noise Margin and Performance of 6T FinFET SRAM Cells with Asymmetric Gate to Source/Drain Underlap Devices | 113 |
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| Evaluation of Static Noise Margin and Performance of 6T FinFET SRAM Cells with Asymmetric Gate to Source/Drain Underlap Devices | 113 |
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| 中國 | 96 |
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